Methods to Increase Fault Tolerance of Combinational Integrated Microcircuits by Redundancy Coding


Citar

Texto integral

Acesso aberto Acesso aberto
Acesso é fechado Acesso está concedido
Acesso é fechado Somente assinantes

Resumo

Increasing the operating reliability of integrated microcircuits (IMC) remains, on the whole, an unsolved design problem. An important aspect of this problem is the stability of the circuits under transient faults (malfunctions) in large integrated circuits. Faults appear due to various disturbances: radiation, supply voltage jumps, signal degradation over time, etc. Investigations show that the probability of an error due to these factors may vary between very wide limits: from less than 0.1% for large circuits and up to 30% for very small circuits. In this article, we consider various methods of enhancing the fault tolerance of combinational circuits and also assess the effect of a single fault and a stuck-at fault on circuit operation for the case of combinational circuits from the ISCAS’85 set.

Sobre autores

S. Gavrilov

Institute for Design Problems in Microelectronics of Russian Academy of Sciences

Email: sgur@cs.msu.ru
Rússia, Moscow

S. Gurov

Faculty of Computational Mathematics and Cybernetics, Moscow State University

Autor responsável pela correspondência
Email: sgur@cs.msu.ru
Rússia, Moscow

T. Zhukova

Institute for Design Problems in Microelectronics of Russian Academy of Sciences

Email: sgur@cs.msu.ru
Rússia, Moscow

V. Rukhlov

Faculty of Computational Mathematics and Cybernetics, Moscow State University

Email: sgur@cs.msu.ru
Rússia, Moscow

D. Ryzhova

Institute for Design Problems in Microelectronics of Russian Academy of Sciences

Email: sgur@cs.msu.ru
Rússia, Moscow

D. Tel’pukhov

Faculty of Computational Mathematics and Cybernetics, Moscow State University

Email: sgur@cs.msu.ru
Rússia, Moscow

Arquivos suplementares

Arquivos suplementares
Ação
1. JATS XML

Declaração de direitos autorais © Springer Science+Business Media, LLC, 2017